Standard Cell Library Characterization of 28nm Process Based on Machine Learning

Yi-qi SHE, Li-jun ZHANG, Jian-bin ZHENG, Ai-lin ZHANG, Yue-ping ZHU, You-zhong LI

Abstract


This article presents a new learning method based on machine learning, which can quickly and accurately draw up the characterization of the Static Random-Access Memory (SRAM) compiler and standard cell library. The timing of 10 standard circuits with different process corners and their key parameters were collected. According to the 10-fold cross validation, the regression model was established by linear regression. After comparing the influence of different parameters on path delay, determination coefficient of training set and testing set were 0.979 and 0.955, respectively. Relative Error of training set and test set were 0.9458 and 0.8736, respectively. Then, the timing of a D type flip-flop (DFF) was selected as the target of the regression. At the same time, the determination coefficients of the regression model training set and the testing set are 0.9992 and 0.9992, respectively. Relative Error of training set and test set were 0.9882 and 0.9868, respectively. The results show that the model fitted the timing of DFF by the path delay of other circuits is better than the previous method.

Keywords


Standard cell library, Machine learning, Linear regression


DOI
10.12783/dtcse/cst2017/12552

Refbacks

  • There are currently no refbacks.